The present invention relates to the field of detecting memory array architectures and in particular to a method, system, and product for detecting row by column structures in Dynamic Random Access Memory arrays.
DRAM is used in a wide variety of memory intensive applications. Consumer electronic devices, for example, phones, electronic organizers, compact disk players, etc., may use DRAM as it is relatively inexpensive and provides relatively fast access. In such devices, memory detection and integrity assurance must occur before the devices may function. Memory detection and integrity assurance are also important when the DRAM is exchanged or replaced, which may occur when upgrading or repairing devices, for example.
One known method of detecting DRAM modules employs detect bits. Detect bits are created when a zero ohm resistor associated with a DRAM module is coupled to a pull up resistor mounted in a receiving socket. When the socket receives the DRAM cell, the zero ohm resistor is coupled to the pull up resistor yielding a low value that uniquely identifies the DRAM's presence. Specific binary codes are created as DRAM modules are received by DRAM sockets.
Another known method of detecting DRAM modules employs serial Electrically Erasable Programmable Read Only Memory (EEPROM). The EEPROMs mount to the DRAM modules and store information relating to the DRAM's speed, size, and configuration.
The use of resistors and EEPROMs to detect memory structure consumes power, may cost valuable board real estate, may identify inaccurate structures, and may increase assembly cost--important considerations for memory applications where size is limited, performance is critical, and low cost is essential.
In light of the strengths and weaknesses of the conventional art, there is a need for a method, system, and product for detecting row by column structures of DRAM arrays. The method, system, and product should circumvent the problem of detecting memory arrays through collateral components while detecting data structures automatically through access routines. There is further need for a method, system, and product that detects memory architecture while assuring memory integrity.